1. Field of the Invention
The present invention relates to a plasma enhanced atomic layer deposition, and more particularly to a plasma enhanced atomic layer deposition system configured for reduced contamination and a method of operating the system.
2. Description of Related Art
Typically, during materials processing, when fabricating composite material structures, plasma is employed to facilitate the addition and removal of material films. For example, in semiconductor processing, a dry plasma etch process is often utilized to remove or etch material along fine lines or within vias or contacts patterned on a silicon substrate. Alternatively, for example, a vapor deposition process is utilized to deposit material along fine lines or within vias or contacts on a silicon substrate. In the latter, vapor deposition processes include chemical vapor deposition (CVD), and plasma enhanced chemical vapor deposition (PECVD).
In PECVD, plasma is utilized to alter or enhance the film deposition mechanism. For instance, plasma excitation generally allows film-forming reactions to proceed at temperatures that are significantly lower than those typically required to produce a similar film by thermally excited CVD. In addition, plasma excitation may activate film-forming chemical reactions that are not energetically or kinetically favored in thermal CVD. The chemical and physical properties of PECVD films may thus be varied over a relatively wide range by adjusting process parameters.
More recently, atomic layer deposition (ALD), a form of PECVD or more generally CVD, has emerged as a candidate for ultra-thin gate film formation in front end-of-line (FEOL) operations, as well as ultra-thin barrier layer and seed layer formation for metallization in back end-of-line (BEOL) operations. In ALD, two or more process gases are introduced alternatingly and sequentially in order to form a material film one monolayer at a time. Such an ALD process has proven to provide improved uniformity in layer thickness and conformality to features on which the layer is deposited.
CVD processes are generally regarded as “dirty” processes compared to PVD processes. CVD processes employ gases that are typically capable of forming deposits on various surfaces within a processing chamber and of escaping into adjacent passages and chambers, such as transport and adjacent processing chambers, to form deposits there. These deposits can flake off forming particulate contamination and can out-gas into the vacuum spaces to deposit elsewhere, including on wafers resting in or passing through those spaces. Such deposits can include films of the type being deposited on the wafer as well as deposits of other compounds formed by the CVD gases as a result of gas compositions, temperatures, energy levels and other factors existing at the surfaces of the various chamber components.
The problem of CVD gases escaping into adjacent chambers has been addressed by applicant's assignee in related U.S. Pat. No. 6,183,564, in which a buffer chamber is disclosed below a processing chamber in a CVD processing module. The buffer chamber is capable of being sealed from the processing chamber and is situated between the processing chamber and a transfer chamber so that the wafers pass through the buffer chamber when entering and leaving the process chamber. Dirty gases escaping from the processing chamber are trapped in and purged from the buffer chamber, thereby minimizing their contamination of the transfer chamber and chambers beyond.
With or without the use of the buffer chamber, after being processed, contaminants are found on wafers processed in the chamber. As features become smaller and films become thinner, this form of contamination is an increasing problem.